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AMD Trinity A10-5800K APU Review

SKYMTL

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The Future is Fusion. This has been AMD’s mantra towards computing over the last few years and it has carried the company towards today’s introduction of the new Trinity A-Series desktop APUs and the Virgo platform umbrella they live under. With this launch, the venerable Llano-series APUs and the Lynx platform will eventually move into end of life status while AMD’s goal of providing consumers with an all-encompassing heterogeneous computing environment moves one more step closer to reality.


Central Processing Units have been the cornerstone of computing tasks since the dawn of the x86 age and will remain so for the foreseeable future. However, AMD is very much a believer that a CPU can –and should- do more for a consumer than just simple processing tasks. In today’s world, users need media acceleration, transcoding capabilities and a myriad of other items a regular x86 processor just can’t accomplish efficiently. On the other hand, graphics processors have long been built with a focus upon the very areas where CPUs were lacking. The APU or Accelerated Processing unit was born of a need to centralize as many CPU, GPU and ancillary core functions as possible in order to offer an efficient one-stop-shop for modern computing needs.

There is a certain logic behind this CPU / GPU synergy since a CPU is great at serial computing tasks while the multi core nature of modern GPUs excels at parallel computing tasks. With this in mind, AMD’s A-series and E-series APUs are meant to be the Swiss Army knives of the processor industry; they can offer decent performance in standard tasks while drastically accelerating many applications that have become integral in our digitized lives. Meanwhile, the FX-series will remain the answer for enthusiasts who don’t need –or want- and APU. The previous generation of Llano-series APUs and their associated Lynx desktop platform was the first step towards making this vision a reality.


Naturally, AMD’s approach hasn’t always met with success and the Virgo platform’s introduction is focused upon addressing several of Llano’s shortcomings. The issue with Llano APUs wasn’t poor performance but rather the fact that AMD was preaching a forward looking philosophy to a market that may not have been entirely prepared for it. Most applications that support GPU accelerated co-processing have only become available in the last 12 months so the previous generation of APUs wasn’t starting from a position of strength to begin with.

Coupled with the lack of supporting applications, the central processing cores on Llano were based off of an outdated Phenom II architecture (which may have been competitive when it was first released) so AMD’s APUs were seriously outgunned in most benchmarks by the Intel competition. This route of sacrificing x86 processing power in favor of a more balanced CPU / GPU approach has continued with Trinity but improvements upon the cores themselves and on-die communications should allow for performance that’s up to modern standards.


One of the major changes AMD has made is to forego an aging x86 processing features in favor of new “Piledriver” CPU cores. These Piledriver cores use AMD’s Enhanced Bulldozer architecture to increase performance in a number of key areas without sacrificing efficiency. All of the new A-series APUs will include between two and four discrete CPU cores grouped into two distinct engines along with an integrated HD 7000-series GPU core. However, even though AMD calls this a “HD 7000” series part, it actually uses the same VLIW4 architecture as the HD 6000-series desktop parts rather than their GCN totting replacements.

Despite a die space of 246mm², 1.3 billion transistors (for comparison’s sake, a Llano die had 1.178 billion transistors and took up about 228 mm²) and an adherence to Global Foundaries’ 32nm HKMG manufacturing process, Trinity’s power efficiency hasn’t suffered. Due in part to the 32nm manufacturing process’ relative maturity and some careful engineering work, Trinity has retained the same 65W and 100W TDP values of its predecessor.


AMD’s new A-series lineup follows closely in the previous generation’s footsteps by offering a broad selection of solutions at a number of price points. Unlike some Llano SKUs, every Trinity processor incorporates Turbo Core 3.0 technology which allows for dynamically adaptable clock speeds based upon core load and TDP overhead. Through a process of careful redesign and optimizations AMD has also been able to bump reference core frequencies to impressive levels. On average, a Trinity APU will have between 20 and 25 percent higher clock speeds than its predecessor, without even taking into account the Turbo speeds. This is largely due to the refinements which have been built into the architecture of the Piledriver CPU cores which take over from the outdated processor technology within Llano.

We can also see that AMD’s Dual Graphics technology has made a comeback on every product while official 1866MHz memory support is available for all segments except the A4 5300. Naturally, these memory speeds can be helped along with AMD’s Advanced Memory Profiles which is a rough analog to Intel’s own XMP and should allow for easy speed increases.

Sitting atop the product stack is the A10-5800K, an unlocked processor that will be priced around $130, which is in line with Intel’s current Ivy Bridge based i3 3220 and makes even this “high end” APU quite affordable as a simple drop-in solution. From the A10 5800K, AMD’s A-series continues downwards with stops at various performance and price brackets between $130 and the A4 5300’s entry level cost of under $60. Every one of these parts look tempting from a price / performance standpoint but the $110 A8 5600K does seem to offer a tantalizing combination of abilities for those who don’t need the A10’s higher end specifications. Obviously, the idea here is to undercut Intel’s offerings while offering (on some products at least) the one thing which the entry level i3 processors lack: unlocked multipliers.

Much like Llano, the TDP of Trinity processors runs between 100W and 65W which is something of a noteworthy accomplishment considering AMD’s new APU still use a 32nm HKMG manufacturing process while running at higher clocks. Unfortunately, these TDP values are quite a bit higher than their Intel counterparts (for example an i3 3225 rings in at just 55W) but AMD is betting that consumers and large OEMs will be drawn to Trinity’s feature set.


AMD is also launching a trio of new Athlon X4 and X2 processors in the form of the X4 750K, X4 740 and X2 340. These are meant to go up against Intel’s low end Pentium beanded Ivy / Sandy Bridge products while also overlapping into the Celeron marketplace for system builders.

Like the Trinity APUs, these use AMD’s new Piledriver cores, feature Turbo Core 3.0 technology and boast high core clocks. What differentiates Athlon from the A-series is their lack of an integrated GPU core, thus lowering costs for the end user. The $81 X4 750K in particular could be an excellent low cost solution for gamers that don’t want an integrated GPU but are running on a shoestring budget. It also happens to include an unlocked multiplier for easy overclocking.

The new A-series APUs and Athlon processors represent a vital step forward after years of disappointing results. While Intel has been able to continue on with their seemingly unstoppable tick-tock approach, AMD has languished amid delayed product launches and supply issues. There’s hope Trinity, Piledriver and upcoming launches will turn things around and return this company to competitiveness but for the time being, Trinity looks to be a definite step in the right direction. However, the question remains: will it be enough?

 
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SKYMTL

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Revising Bulldozer; Say Hello to Piledriver

Revising Bulldozer; Say Hello to Piledriver


Instead of sticking to the old Athlon / Husky CPU architecture that graced the Llano APUs, AMD's Trinity has now moved on towards higher performance CPU cores that are based off of a revision of the modular Bulldozer design. Code named Piledriver (otherwise known as Enhanced Bulldozer), we’ll be seeing this optimized design in dedicated eight core Vishera FX-branded CPUs sometime in the very near future.

Naturally, the inclusion of Piledriver CPU cores should make a difference in terms processing performance over the previous generation but there are some tertiary benefits as well. Turbo Core 3.0 has been incorporated, resulting in better efficiency through highly adaptable clock speed scaling and instruction paths have been optimized as well.


Based around a 32nm manufacturing process, equipped with a pair of cores and up to 2MB of L2 cache, the basic Bulldozer module hasn’t changed all that much in its Piledriver guise. There have been some minor changes like the addition of the FMA3 and F16C instruction sets but AMD’s major focus here was to increase the instruction per clock (IPC) rate and generally improve upon the operational frequencies of the previous generation. The relative maturity of GlobalFoundries’ 32nm node also led to a substantial leakage reduction when compared against Bulldozer.

For those of you keeping track of such things, there’s a huge difference between Llano’s Propus / Husky core architecture and this one. We won’t bore you with fine grain details here (more about the Bulldozer architecture can be found HERE) but the move to Piledriver compute modules has resulted in an impressive performance increase for the Virgo platform over Llano.


Diving a bit further into the Piledriver, the enhancements seem to be everywhere. Most are supposed to home in on streamlining branch scheduling throughout the architecture and optimize certain elements for quicker communication.

However, there have been some sacrifices here since –as with the previous Bulldozer design- space has been given over for the aforementioned newer instruction sets rather than a strict adherence to legacy standards. As a result, programmers using compilers like Visual Studio 2008 and older versions of Visual Basic will see their applications possibly run slower on Bulldozer-based cores due to a lack of x87 and other optimizations. While this may not be an optimal solution for every situation this emphasis upon SSE, AVX, XOP and other new, emerging instruction sets has allowed AMD to maximize their die space for current (and future) computing needs. Plus, the number of programs that use the legacy instruction sets is diminishing at a rapid rate.
 

SKYMTL

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Under the Hood: Trinity’s Architecture

Under the Hood: Trinity’s Architecture



As we have mentioned previously, the basic layout of Trinity isn’t that far removed from the first generation of APUs but there are some significant changes. In its highest end A10 configuration, Trinity will include up to two Piledriver compute modules with two cores each and 2MB of L2 cache for quick data access. Lower end derivatives will only include a single module with two cores and in some cases only 512KB of memory per core, thus reducing power consumption even more.

The two 64-bit memory controllers have also been updated to support a broader range of P-states which isn’t particularly important for most desktop systems but the on-the-fly memory frequency scaling could be beneficial in some low-power STB configurations. There’s still built in support for 1.5V DIMMs and like in Llano, the controllers still support up to 64GB in desktop systems in dual channel mode.


The major changes in the Trinity architecture are buried within the new Unified Northbridge which represents AMD’s first attempt at creating an all-in-one communication solution for their present and future APUs. Within it, a dedicated PCI-E link replaces Hypertransport protocol to the chip’s main I/O devices, APU power management can be regulated on the fly and memory controller requests can be effectively shared between the processing stages and the GPU.


The links between each section of the APU follow in the same footsteps as the previous generation but AMD has refined certain interconnects with the goal of speeding up information transfers. The AMD Fusion Compute Link is still considered to be a medium bandwidth connection which manages the complex interaction between the onboard GPU, the CPU’s cache and the system memory. Unlike in the past, AMD has finally refined this interconnect, giving the GPU direct access to a coherent memory space while the CPU can now directly access the GPU’s dedicated framebuffer if needed. This is one of the primary reasons why Trinity’s theoretical data throughput has jumped from 572 GFLOPS to 736 GFLOPS.

The Radeon Memory Bus on the other hand is the all-important link between the onboard graphics coprocessor and the primary on-chip memory controller. Rather than acting like a traffic cop (a la Fusion Compute Link) which tries to direct the flow of information, this memory bus is all about the GPU having unhindered high bandwidth access to the system’s memory controllers.

In the previous generations of AMD IGPs, before Llano came around, the Northbridge’s graphics processor had to jump through a series of hoops before gaining access to onboard memory which is partially why 128MB of “SidePort” memory was sometimes added. However, the APU’s single chip, all in one solution allows for the elimination of many potential bottlenecks.


The graphics core within Trinity should look familiar since we last saw this layout back in the HD 6000 days. Instead of using the newer GCN Southern Islands architecture, Trinity’s SIMD engines rely on the slightly older Northern Islands with its VLIW4 instruction set. The only exception is the new Video Codec Engine which acts as one stop shop for hardware encoding via the GPU’s compute engine and provides a highly parallel scalable pipeline for many high definition tasks. It can also provide additional benefits for transcoding and output tasks.

There are a number of differentiating factors between Trinity’s “HD 7000” series IGPs and those which graced Llano. First and foremost, the previous generation APUs housed an updated Redwood core –code named Sumo- that used a VLIW5 design that would be considered outdated and inefficient by today’s standards. While dynamic power gating has been retained in the VLIW4 design housed within these new APUs, it has been updated to support lower idle power consumption and engine speeds. VLIW4 also brings with it a number of rendering pipeline improvements which should allow these new APUs to pull significantly ahead of their predecessors.

Unfortunately, in order to maintain a clear generational differentiation, AMD’s spin doctors have given these graphics cores a HD 7000 series name even though they contain an older architectural design. Nonetheless, they still come equipped with some serious graphics processing muscle. In an A10 APU, there will be 384 stream processing units (or cores), 24 texture units and 8 ROPs, mirroring the layout of a HD 66xx desktop part.
 

SKYMTL

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Introducing the FM2 Socket & Virgo Platform

Introducing the FM2 Socket & Virgo Platform


One of the major benefits of AMD’s platforms over the years has been their ability to accept new processors as simple drop in upgrades, usually after a simple motherboard BIOS update. Unfortunately, due to a number of reasons –among them a change from 905 to 904 pins and a slightly different power delivery subsystem- Trinity APUs won’t be backwards compatible with older FM1 motherboards. They will instead use a new socket called FM2.


Physically, there isn’t all that much to differentiate one socket from another and the move away from FM1 may tick some longtime AMD customers off but there is a method to this madness. This revised FM2 socket being introduced with the Trinity APUs and new Athlon CPUs boasts forwards compatibility with the next generation APU architecture (presumably Steamroller-based products) which we’ll likely see sometime in 2013. So even though FM1 may not be around anymore, AMD certainly isn’t going through the planned intergenerational obsolescence their competitors typically put forth.

The FM2 family will initially consist of three chipset families, each targeting a different portion of the market through various price points. The performance-oriented A85X sits at the table’s head and will most likely be paired up with A10 APUs while the A75 chipset will likely be the most popular since it offers a good amount of feature and an affordable cost. We should see quite a few mATX and even ITX boards based around an A75 chipset. Meanwhile, the A55 will bring up the rearmost position but it is still fully capable of fulfilling most people’s needs.


The general layout of AMD’s new chipsets don’t differ all that much from the previous generation, particularly on the high end A85X SKU. The Fusion Controller Hub (FCH) is still used as a centralized point for much of the platform’s I/O needs which means everything from SATA ports to HD audio is handled through this single chip solution. AMD has also integrated high speed USB 3.0 ports and SATA 6Gbps into this design which once again reflects the options available on the outgoing A75 FCH.

Connecting the FCH to the APU is the Unified Media Interface (or UMI) which consists of four PCI-E 2.0 lanes for I/O transfers and system management. This results in an interconnect bandwidth of 2 GB/s which is a far cry from the 4.16 GB/s (5.2 GT/s) of other generation’s Northbridge / CPU pathway. However, the high bandwidth of Hypertransport 3.0 between what amounts to a glorified Southbridge and the APU isn’t needed since the FCH doesn’t contain the platform’s x16 PCI-E lanes.


From a chipset perspective, the APU hasn’t received a makeover either since it still houses support for the 16 primary PCI-E lanes, up to 64GB of 1866MHz DDR3 memory and the primary DVI, HDMI and Displayport outputs. AMD has incorporated support for x8 / x8 Crossfire (which wasn’t an option on most Llano motherboards) into the A85X but PCI-E bandwidth has still remained at 2.0 speeds rather than the newer 3.0 spec. For the time being, NVIDIA’s SLI isn’t supported.

There are however some minor changes which should allow these new motherboards to become a bit more adaptable to the current market realities. Naturally, the most notable change is the trio of chipset options replacing the old A75 and A55 duo. This should give consumers additional choices and motherboard manufacturers more leeway for pricing segmentation. Just be sure to pay attention to what socket you’re buying since both A75 and A55 designations have been carried over from the Llano days without anything to distinguish the new from the old.

In the highest end configuration, an additional two SATA 6Gbps ports have been added for a total of eight and RAID 5 compatibility should augment capabilities for multi drive systems. In addition, FIS based switching for the eSATA ports is now supported on both the A75 and A85X.


The A85X may be AMD’s flagship platform for Trinity APUs but the A75 and A55 are still perfectly capable. The A75 incorporates many of the same features as its higher end sibling but goes without Crossfire support and two less SATA 6Gbps boards. Basically, it is a literal mirror image of last generation’s A75 but with an FM2 socket. The A55 meanwhile can be considered the bare-bones configuration which still uses a single PCI-E x16 slot but has SATA 6Gbps, native USB 3.0 and FIS based switching completely removed. The former two features can be added through the use of secondary controller chips but due to the cost involved, don’t expect too many A55 boards to have USB 3.0 or SATA 6Gbps.
 

SKYMTL

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AMD’s Dual Graphics & Radeon RAMDisk

AMD’s Dual Graphics


Back when Llano was first launched, consumers were introduced to AMD’s Dual Graphics technology which allowed the graphics processor within an APU to be paired up with a discrete add-in card for increased performance. This hybrid setup used the lower end Turks, Caicos and Cedar-based discrete cores which were siblings with Llano’s HD 6000D-series cores. This unique Dual Graphics technology has been carried over into the Trinity generation but in a slightly different way and is bound to be confusing for some end users.


The HD 7000-series graphics processor at the heart of all Trinity APUs uses the VLIW4 architecture found in HD 6000 discrete cards. As such, the new APUs can only be paired up with HD 6600, HD 6500 and HD 6400 cards (all of which also use updated VLIW4 shader execution units) and the performance benefits should be more than apparent. We should also mention that none of these lower end discrete cards have been replaced with updated HD 7000-series other than within the OEM market. This means they’re all still readily available within the retail channel.


With this generation of Dual Graphics, AMD is once again pushing the price / performance ratio for low cost, entry level systems. We call this “entry level with some GPU balls” since pairing up an A10 APU with a simple sub-$100 discrete part can grant playable framerates at 1080P in today’s newest titles, even with higher detail settings enabled. Naturally, the benefits will only be realized if AMD has pushed out Crossfire profiles for newer titles but with their new APP system in place and additional Gaming Evolved wins, we should see continual improvement in this field.

Like the previous APU generation, there are some telltale roadblocks here. While pairing up a HD 6670 with an A10-series APU could dramatically improve performance, it does represent a bit of a dead end since Dual Graphics won’t work with higher performing graphics cards. Should this solution prove inadequate for upcoming titles, upgrade options will be limited to more expensive GPUs since the cumulative effect of IGP + discrete effectively stops at the HD 6600-series for the time being. Nonetheless, we happen to love the possibilities Dual Graphics technology opens up and we will be looking at it more closely in the coming weeks.


AMD Introduces Radeon RAMDisk



In the SSD arena, application caching is becoming all the rage these days. With caching enabled, a simple, inexpensive 30GB or 60GB SSD can be paired up with a large capacity HDD to offer lightning quick application load times for a fraction of a 250GB SSD’s cost. The caching setup does this by storing your system’s most-used boot files on the SSD in order to take advantage of its higher performance. AMD is now porting a version of this technology onto the Virgo platform and they call it Radeon RAMDisk.

Radeon RAMDisk operates much like SSD caching but instead of using an SSD, it dedicates a portion of the system memory towards caching operations and treats this segmented area as a discrete “drive”. All AMD has to do is provide the necessary software (which isn’t yet available) to make this vision a reality on their systems.

Due to its rapidly accessible nature, RAM has always an excellent candidate for memory-based application acceleration but in the past, prices held back widespread adoption of large memory allotments within systems. Fast forwarding to the present day, we see a market that offers 32GB of DDR3-1600MHz memory for under $175, making RAM drives a possibility. Over the next year, densities will continue to increase and 64GB quad channel kits should become more readily available and with Trinity’s support of high density ICs, platform support won’t be a problem.


For larger memory configurations that can sacrifice some capacity for caching abilities, AMD’s RAMDisk will drastically improve system responsiveness. However, with the current 32GB memory kits, RAMDisk will always have to strive for a delicate balance between load time acceleration and available system resources. In most cases it should dedicate about 8GB to general memory tasks while the remaining 24GB will go towards application loading. As a result only a limited number of program files will be cached at any one time. We hope to test this feature once AMD makes the software available.
 

SKYMTL

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Additional HD Picture Enhancements

Additional HD Picture Enhancements


As the market slowly shifts away from desktop-centric system, more and more importance is being put upon the capability (or lack thereof) of mobile platforms to provide a rich entertainment experience. Previous architectures struggled to deliver high quality video streams and simply couldn’t provide the decoding performance necessary for stereoscopic 3D signal processing. Trinity on the other hand takes the improvements from the Llano architecture and improves upon then in a few key areas.


In terms of HD decoding, Trinity’s use of UVD3 doesn’t bring anything new to the table when compared to Llano other than additional performance and enhanced efficiency. This is completely understandable since Llano already had an extensive list of supported codecs and features.

Remember, AMD’s Universal Video Decoder has been around for years and is known as one of the most capable video processing platforms currently available. In its second iteration, UVD took the next logical step forward with an expanded list of accelerated codecs in addition to the ones already in place from past generations.

One of the main features which was added to UVD3 was the ability to decode videos which use MVC encoding. As part of the H264 / MPEG-4 AVC codec, MVC is responsible for creating the dual video bitstreams which are essential for stereoscopic 3D output. Supporting this standard gives AMD’s APUs the ability to process Blu Ray 3D movies through a HDMI 1.4a connector. MPEG-4 Part 2 hardware acceleration for DivX and Xvid codecs has also been added.


While AMD has stayed the course on the HD decoding front, Trinity brings a long list of new output features due to its use of DisplayPort 1.2. DP 1.2 brings to the table multi-stream support for display daisy chaining and enhanced Eyefinity options for up to four simultaneous displays, both of which could come in handy for future AV applications. The new Vision Control Center allows for display grouping as well, giving users the possibility of combining multiple displays to act as a single large display. In addition, the GPU display engine has built-in wireless display compatibility.

Sound output options have been expanded with support for high bitrate 7.1 channel surround sound over HDMI and DisplayPort. This means audio formats such as PCM, AC-3, AAC, DTS, Dolby TrueHD and DTS MA are all included and to add icing on the cake, Trinity can process up to FOUR independent 7.1 audio streams.

As with many of AMD’s current GPU architectures, Trinity has several built-in image quality enhancements which include 4:2:0 color sampling, optimizations for scenes changes audio / video multiplexing and color gamut remapping for wide gamut panels.


All of the new entertainment features have been neatly packaged into a generalized Media Accelerator but this shouldn’t in any way reduce their effectiveness. There are quite a few elements here. AMD Picture Perfect HD boosts contrast, colour and resolution in real time for improved picture quality while Steady Video can be enabled in the Vision Control Panel and will automatically smooth out videos, be they online or from your own hard drive. We’ve already touched upon the Accelerated Video Converter but the most interesting new feature has to be AMD Quick Stream technology.

Quick Stream is an easy marketing name for a complex technology which allows for drastic performance improvements in certain predetermined types of online content. It prioritizes the downstream and upstream internet packets in real time in an effort to accelerate the most demanding workloads (like Youtube video streaming) without negatively impacting general usage scenarios like web surfing.

Unfortunately this option isn’t user controllable but it can be implemented by a manufacturer that wants to put emphasis upon certain online functions. For example, the manufacturer of a gaming motherboard could give priority to Steam and online gaming traffic while minimizing the bandwidth used by Windows updates and general web surfing. Alternately, entertainment PCs may put higher emphasis upon Youtube video priority and other Flash / Silverlight / HTML5 streams.
 

SKYMTL

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Test Setups & Methodology

Test Setups & Methodology


For this review, we have prepared a number of different test setups, representing many of the popular platforms at the moment. As much as possible, the test setups feature identical components, memory timings, drivers, etc. Aside from manually selecting memory frequencies and timings, every option in the BIOS was at its default setting.


For all of the benchmarks, appropriate lengths are taken to ensure an equal comparison through methodical setup, installation, and testing. The following outlines our testing methodology:

A) Windows is installed using a full format.

B) Chipset drivers and accessory hardware drivers (audio, network, GPU) are installed.

C)To ensure consistent results, a few tweaks are applied to Windows 7 and the NVIDIA control panel:
  • UAC – Disabled
  • Indexing – Disabled
  • Superfetch – Disabled
  • System Protection/Restore – Disabled
  • Problem & Error Reporting – Disabled
  • Remote Desktop/Assistance - Disabled
  • Windows Security Center Alerts – Disabled
  • Windows Defender – Disabled
  • Screensaver – Disabled
  • Power Plan – High Performance
  • V-Sync – Off

D) Windows updates are then completed installing all available updates

E) All programs are installed and then updated, followed by a defragment.

F) Benchmarks are each run three to eight times, and unless otherwise stated, the results are then averaged.

G) All processors had their energy saving options / c-states enabled
 

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System Benchmarks: AIDA64 / Cinebench r11.5

System Benchmarks


In this section, we will be using a combination of synthetic benchmarks which stress the CPU and system in a number of different domains. Most of these tests are easy to acquire or are completely free to use so anyone reading this article can easily repeat our tests on their own systems.

To vary the results as much as possible, we have chosen a selection of benchmarks which focus upon varied instruction sets (SSE, SSE3, 3DNow!, AVX, etc.) and different internal CPU components like the floating point units and general processing stages.



AIDA64 Extreme Edition


AIDA64 uses a suite of benchmarks to determine general performance and has quickly become one of the de facto standards among end users for component comparisons. While it may include a great many tests, we used it for general CPU testing (CPU ZLib / CPU Hash) and floating point benchmarks (FPU VP8 / FPU SinJulia).


CPU ZLib Benchmark

This integer benchmark measures combined CPU and memory subsystem performance through the public ZLib compression library. CPU ZLib test uses only the basic x86 instructions but is nonetheless a good indicator of general system performance.




CPU Hash Benchmark

This benchmark measures CPU performance using the SHA1 hashing algorithm defined in the Federal Information Processing Standards Publication 180-3. The code behind this benchmark method is written in Assembly. More importantly, it uses MMX, MMX+/SSE, SSE2, SSSE3, AVX instruction sets, allowing for increased performance on supporting processors.


RESULTS: AMD’s APUs are able to pull ahead in these first benchmarks and sometimes lead Intel’s competing processors by a wide amount. However, the A10-5800K is only slightly faster than its predecessor despite its significantly higher clock speeds.



FPU VP8 / SinJulia Benchmarks

AIDA’s FPU VP8 benchmark measures video compression performance using the Google VP8 (WebM) video codec Version 0.9.5 and stresses the floating point unit. The test encodes 1280x720 resolution video frames in 1-pass mode at a bitrate of 8192 kbps with best quality settings. The content of the frames are then generated by the FPU Julia fractal module. The code behind this benchmark method utilizes MMX, SSE2 or SSSE3 instruction set extensions.

Meanwhile, SinJulia measures the extended precision (also known as 80-bit) floating-point performance through the computation of a single frame of a modified "Julia" fractal. The code behind this benchmark method is written in Assembly, and utilizes trigonometric and exponential x87 instructions.



RESULTS: These benchmarks provide a very yin and yang view of the new A10-5800K, mostly due to instruction set support. While x86 supporting applications allow it to pull slightly ahead of Llano and the lower end Intel processors, a lack of x87 support causes it to lag far behind every other processor in the SinJulia test.



CineBench r11.5 64-bit


The latest benchmark from MAXON, Cinebench R11.5 makes use of all your system's processing power to render a photorealistic 3D scene using various different algorithms to stress all available processor cores. The test scene contains approximately 2,000 objects containing more than 300,000 total polygons and uses sharp and blurred reflections, area lights and shadows, procedural shaders, antialiasing, and much more. This particular benchmarking can measure systems with up to 64 processor threads. The result is given in points (pts). The higher the number, the faster your processor.


RESULTS: This is another benchmark which the A10 lags behind the previous generation processors, once again due to the instruction sets and code paths being used within CineBench r11.5. While AMD may state that programs are moving towards updated programming languages, many applications still stick with older instructions which results in poor performance for Piledriver CPU cores.
 
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SKYMTL

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System Benchmarks: Civ V / PCMark 7

System Benchmarks (pg.2)



Civilization V: Gods & Kings Unit Benchmark


Civilization V includes a number of benchmarks which run on the CPU, GPU or a combination thereof. The Unit Benchmark simulates thousands of units and actions being generated at the same time, stresses multi core CPUs, system memory and GPU We give the non-rendered score below as it is more pertinent to overall CPU performance within the application.


RESULTS: Here AMD’s new APU drops further back from the pack and actually finishes in last place. It really seems like the Piledriver cores don’t like certain applications.



PCMark 7


PCMark 7 is the latest iteration of Futuremark’s system benchmark franchise. It generates an overall score based upon system performance with all components being stressed in one way or another. The result is posted as a generalized score. We also give the Computation Suite score as it isolates the CPU and memory within a single test, without the influence of other components.



RESULTS: In a bout of redemption for the A10-5800K, PCMark shows it running neck and neck with the Intel i3 3225 which is a great result considering how close the two are in terms of pricing. It also handily beats the Llano APUs by an arm’s length.
 
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SKYMTL

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System Benchmarks: 3DMark (CPU) / WPrime

System Benchmarks (pg.3)



3DMark06 CPU


While 3DMark06 may be a slightly older synthetic benchmark, its CPU test still allows for multi threaded performance evaluations within a gaming environment. It effectively removes the CPU from the equation, generating a CPU-centric score.




WPrime


wPrime is a leading multithreaded benchmark for x86 processors that tests your processor performance by calculating square roots with a recursive call of Newton's method for estimating functions, with f(x)=x2-k, where k is the number we're sqrting, until Sgn(f(x)/f'(x)) does not equal that of the previous iteration, starting with an estimation of k/2. It then uses an iterative calling of the estimation method a set amount of times to increase the accuracy of the results. It then confirms that n(k)2=k to ensure the calculation was correct. It repeats this for all numbers from 1 to the requested maximum. This is a highly multi-threaded workload. Below are the scores for the 32M and 1024M benchmarks.



RESULTS: Once again a lack of older instruction set support comes back to slap the A10-5800K down in both 3DMark06 and both WPrime tests. This is quite disappointing for AMD since it doesn’t shine a good light upon their newest core design, especially considering most programs on the market don’t use the newer AVX, XOP, etc. instructions.
 
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