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Intel officially announces 8th gen Coffee Lake

Anything in this announcement we didn't already know? The high boost clock on all 6 cores is nice to see.

https://www.anandtech.com/show/11869/intel-announces-8th-generation-coffee-lake-hex-core-desktop-processors

Also, wasn't sure if this should be News or CPUs topic. If someone with the required power wants to move it feel free.

I either didn't know or forgot, but it looks like the 8600k and 8700k have 40 Pcie lanes. Pretty good news for multi-gpu setups and PCIe SSD users.
 
I either didn't know or forgot, but it looks like the 8600k and 8700k have 40 Pcie lanes. Pretty good news for multi-gpu setups and PCIe SSD users.

Unless I'm out to lunch, not really. Intel has played this "PCIE lanes" game before. Its not clear (and probably accurate based on previous releases) that this count uses the 'GPU' pcie lanes off the CPU as well as part of this "up to 40".

So, you're literally looking at some sort of implementation of a direct 16-32 lanes of PCIE GPU dedicated direct CPU access, and 8-24 PCIE lanes left over through the chipset and then the DMI 3.0 connection for your SSD, SATA, and other various add-ins.

Thats pritty pathetic actually if I'm right.

Edit: Two things; Looks like only x16 lanes off CPU, a second graphics card has to go through the chipset unless the board manufacturer splits the CPU to two x8 connections...and I forgot to mention that the DMI 3.0 is limited to 3.93GB/sec for ALL activity through the chipset to CPU, regardless of PCIE use, which is equivalent to PCIE 3.0 x4. Ouch.

Hope you werent planning on using any combo of Optane, dual GPU, SSDs, or other high bandwidth devices.
 
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I believe Sagath is right, it doesn't look like it has changed from Z270, which was also "40x PCI-E 3.0 lanes" if you added up all the available lanes from HSIO (chipset) (24x) with the CPU (16x).
 
I should have known it was too good to be true. That you can't do a 16x/16x off the CPU and even 8x off the chipset is a bit disappointing. Is there a legitimate technical reason why it has to go trough the chipset instead of the CPU or is it just intel being.... intel?
 
Architecture limitations I believe. I think it would be reasonable to assume that segmentation also plays a role, but I'm not sure how much. At any rate, my understanding has been that adding additional PCI-E lanes will affect TDP(/Power Consumption) rather significantly. Intel seems keen on maintaining TDPs to satisfy OEMs, so in balancing cores, clockspeed, and PCI-E lanes, it makes sense that traditionally PCI-E slots was where the sacrifice would be or the mainstream platform. For general usage scenarios - including gaming, it was okay that additional connectivity was being provided via a slower and higher latency link to the chipset's lanes.

With the rise of PCI-E based storage, it's quickly becoming inadequate. It's interesting because total throughput that DMI 3.0 provides via it's x4 lanes seems to only be one particular failing -connectivity from CPU lanes directly to devices also has less latency, and you can see differences in performance in very high speed NVMe drives when they are connected in the two different ways. Whether or not those could be felt in a majority of usage scenarios if another matter entirely.
 
With the rise of PCI-E based storage, it's quickly becoming inadequate. It's interesting because total throughput that DMI 3.0 provides via it's x4 lanes seems to only be one particular failing -connectivity from CPU lanes directly to devices also has less latency, and you can see differences in performance in very high speed NVMe drives when they are connected in the two different ways. Whether or not those could be felt in a majority of usage scenarios if another matter entirely.

I'm sure it can be, but its limited for now to a select few users. 4GB/sec is still a LOT, and SSD's (in singles) are still only pushing <4GB for now (I think a 950 Sammy does max 3500ish?). Dual GPU with a SSD is probably the only way you're going to throttle this, or Tri-GPU (which probably explains why nVidia has been pulling back from support of it, hardware limitations introduced by intel perhaps?).

This is probably why Intel doesnt care. The real world scenarios where you're throttling something because of only 4GB of bandwidth is a percent of a percent of people. I mean how many people are reading and writing to a nvme SSD at ~3GB while playing games with a Dual/Tri GPU setup?
 
Unfortunately Ryzen won't offer better results in those particular scenarios either - you have no choice but to move to an HEDT platform to ensure you've got enough lanes to work with.

While Ryzen has an extra 4x PCI-E lanes on the CPU, the motherboard configurations I've seen are always allocated to a dedicated M.2 slot. The remaining 4x appear to be the link to the chipset, so it's disingenuous to include them - we don't include the DMI 3.0's x4 lanes either.
 
I'm seeing articles in the past day or so indicating the pin layout of the socket for Z370 is different than Z270.

This can be interpreted in two ways:

1) Intel ensures stability and compatibility of the new higher core CPUs by forcing a revision
2) Intel fabricates a way to force you to buy a new motherboard - this benefits the motherboard manufacturers moreso, but Intel still does benefit both directly and indirectly.

Unfortunately, it does little to soften the blow that you have to buy a new motherboard, and also that Ice Lake will require another change through Z390.
 
More power required according to this guy.

https://twitter.com/david_schor/status/914874843195219974

Also here:

https://www.techpowerup.com/237508/...nt-pin-configuration-than-previous-generation

Since my upgrade will be whole platform the MB issue is of no consequence as I need an Ryzen MB or a Coffee Lake MB. I can understand the frustration of people who bought new earlier this year, but that happens with tech all the time. You buy now, or you wait and see and buy later, but no matter what happens something new is coming... sooner or later!
 

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